Tohoku University. Research Profiles

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High Performance Computer Architectures and their Applications

update:2017-01-31
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Features

My research interests include the design and development of high-performance supercomputing systems and their applications. Targeted areas range from the key components of supercomputing systems, which include processor architectures, memory subsystems, network systems, task schedulers, and compilers, to high-performance multimedia processing algorithms such as photo-realistic computer graphics.


Targeted Application(s)/Industry

Currently I am conducting joint-research projects with several companies in the fields of high-performance computer architecture design and advanced simulation technologies for industrial design such as next-generation supercomputers and highly efficient and comfortable regional jets.

Researchers

Graduate School of Information Sciences

KOBAYASHI, Hiroaki , Professor
Doctor of Engineering

Collaborative Researchers

Keywords

Related Information

US Patent
Hiroaki Kobayashi, and Yasumasa Saida, “Cache Memory with the Number of Operated Ways Being Changed According to Access Pattern,” US-Patent No. US 7,437,513 B2 (Oct. 14, 2008), Publication No. US-2005-0246499-A1 (Nov. 03, 2005).

Publication
A Power-Aware Shared Cache Mechanism Based on Locality Assessment of Memory Reference for CMPs[Transactions on High-Performance Embedded Architectures and Compilers, Vol. 3, No.1, 2008, pp.149-167.]
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